The present invention is directed, in general, to a method of forming a gate dielectric, and in particular, a method of forming a nitrided gate dielectric with a uniform distribution of nitrogen in the bulk thereof.
In certain semiconductor applications it is necessary to integrate dual gate oxide (DGO) thicknesses for associated transistor devices onto a single integrated circuit device. One motivation for performing dual gate oxide processing is that high performance transistors typically operate at lower voltages (e.g., 0.8 volts to 1.5 volts), and thus require thinner gate dielectric regions, whereas devices that interface with most conventional external peripherals typically require higher operating voltages (e.g., 1.8 volts to 3.5 volts), and thus require thicker gate dielectric regions. When interfacing lower voltage high performance metal-oxide-semiconductor field-effect-transistors (MOSFETs) within a core of an integrated circuit, to higher voltage peripheral devices, input and output (I/O) buffers of the integrated circuit (IC) are typically designed to contain thicker gate dielectric regions that are compatible with the higher external peripheral device voltages.
For example, current microcontroller units (MCUs) and digital signal processors (DSPs) are integrating several different types of technology onto a single integrated circuit, such as high speed logic, power logic, static random access memory (SRAM), nonvolatile memory (NVM), embedded dynamic random access memory (DRAM), analog circuitry, and other devices and technologies. Many of these devices require different gate dielectric processing and different gate dielectric thicknesses to provide both high performance lower voltage devices within the core of the device and higher voltage I/O devices to interface with external peripheral devices.
As stated above, a dual gate thickness structure includes thin gate dielectrics for high performance low voltage operation core devices, and thick gate dielectrics for low leakage high voltage operation I/O devices. High performance devices with thin gate dielectrics are prone to leakage as the gate thicknesses fall below about 1.2 nm. A well-established technique of mitigating the leakage current in a gate dielectric material such as silicon dioxide is to introduce nitrogen into the gate dielectric to raise the dielectric constant. This allows the use of a thicker gate dielectric where a thinner dielectric would ordinarily be needed, providing for less leakage through the gate dielectric. But nitridation is also beneficial for the performance of the I/O devices. For example, nitridation serves to suppress certain effects that decrease reliability, such as negative bias temperature instability (NBTI).
One method of nitrogen atom introduction includes performing non-thermal nitridation (e.g., plasma nitridation) on the gate dielectrics. Unfortunately, this and other methods of introducing the nitrogen atoms into the gate dielectrics are limited in the depth of nitrogen penetration in the gate dielectric material, resulting in non-uniform nitrogen concentration with increasing depth into the gate dielectric material. The non-uniformity, and thus reduced reliability, is particularly significant in thicker gate dielectrics, such as those used in the aforementioned high voltage devices.
Accordingly, what is needed in the art is a method for including nitrogen within a dielectric layer that will result in improved non-uniformity characteristics in the bulk region thereof.